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Xilinx SDAccel / SDSoC 2018.2 x64
Xilinx SDAccel / SDSoC 2018.2 x64 | 20.65 GB

SDAccel is an OpenCL programming system, C / C ++ for heterogeneous systems with the implementation of hardware accelerators on Xilinx FPGA. OpenCL is one of the options for using the C ++ language for developing FPGA firmware. SDAccel supports any combination of OpenCL, C, and C ++ cores with libraries for FPGA design. This environment allows parallel programming of both the central processor and FPGA accelerators.

SDSoC development environment is intended only for Zynq (this is a chip in which there is a FPGA and an AWP processor in one package).
Add. Information: Starting with version 2016.3, SDAccel and SDSoC combined into one package called SDx. SDSoC works in ShiChuang and Linux. SDAccel only works under some versions of Linux.
SDSoC and SDAccel are characterized by the fact that the FPGA project already fades into the background. In the foreground - the algorithm. Both systems allow modeling at the level of the original algorithm written in C / C ++ and then translate it to FPGA. This allows you to dramatically increase the complexity of the algorithm.
If we compare the programming for the FPGA on VHDL / Verilog and on C / C ++, then it begs the analogy between programming for conventional processors in C / C ++ and in assembler. Assembler can be made more compact and fast code, and in C / C ++ you can write a more complex program.

Year / Release Date: 2018
Version: 2018.2
Developer: Xilinx Inc.
Digit capacity: 64bit
Interface Language: English
Tabletka: present
SDAccel system requirements:
The presence of one of the accelerators:
Xilinx Kintex UltraScale FPGA KCU1500 Reconfigurable Acceleration card based on XCKU115-FLVB2104-2-E FPGA
Xilinx Virtex UltraScale + FPGA VCU1525 Reconfigurable Acceleration card based on XCVU9P-L2FSGD2104E FPGA.
Host computer for an accelerator with features:
Mat. card with support for PCIe Gen3 X8 slot,
64 GB OP
100 GB of free hard disk space.
Computer for programming: PC with installed environment Vivado Design Suite 2018.2 and Xilinx Platform Cable USB 2 (HW-USB-II-G).
OS Red Hat Enterprise Workstation / Server 7.3-7.4 (64-bit), CentOS 7.2, Ubuntu Linux 16.04.3 LTS (64-bit)
SDSoC system requirements:
Availability of one of the developer platforms:
ZC702, ZC706, ZedBoard based on Zynq-7000 SoC,
ZCU102, ZCU104, ZCU106 based on Zynq UltraScale + MPSoC.
For ShiChuang version: WeiRuan-->WeiRuan ShiChuang 7 / 8.x / 10 Professional (64-bit);
For Linux version: Red Hat Enterprise Workstation OS 6.7 / 6.8, Red Hat Enterprise Workstation Server / Server 7.3-7.4 (64-bit), CentOS 7.2 / 7.3 / 7.4 (64-bit), Ubuntu Linux 16.04.3 LTS (64-bit )



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